Figure 6 shows an astable circuit based on a NOT logic gate - AQA - A-Level Physics - Question 4 - 2018 - Paper 8
Question 4
Figure 6 shows an astable circuit based on a NOT logic gate. The symbol in the centre of the logic gate means that the output voltage V₀ changes at two different inp... show full transcript
Worked Solution & Example Answer:Figure 6 shows an astable circuit based on a NOT logic gate - AQA - A-Level Physics - Question 4 - 2018 - Paper 8
Step 1
Calculate PRF
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Answer
To calculate the pulse repetition frequency (PRF) using the given formula:
PRF=1.4×5.1×103×10×10−91≈14 kHz
Step 2
Draw output voltage V₀
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Answer
On Figure 7, draw a square wave that alternates between 0 V and 5 V, corresponding to the UST and LST values.
Step 3
Calculate the new resistor for frequency modification
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To achieve a frequency 4 times the original, the new frequency (f') will be:
f′=4f=4×14 kHz=56 kHz
Using the frequency formula, solve for R:
R=1.4×f′×C1=1.4×56×103×10×10−91≈1.71 kΩ
This resistor should be added in parallel with the existing resistor to modify the PRF.
Step 4
Calculate R₁ and R₂ for 5 kHz with 75% duty cycle
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Answer
For a 5 kHz signal, the period (T) is:
T=5 kHz1=0.2 ms
With a 75% duty cycle, the charging time (t_c) is:
tc=0.75×T=0.15 ms
Plugging into the charging formula:
0.15 ms=0.7×(R1+R2)×10×10−9
Solving for R₁ + R₂ gives:
R1+R2=21.43 kΩ
For the discharging time (t_d):
td=0.25×T=0.05 ms
Using the discharging time formula:
0.05 ms=0.7×R2×10×10−9
Solving for R₂ gives:
R2=7.14 kΩ
Assuming R₁ and R₂ are 14.29 kΩ and 7.14 kΩ respectively are valid values for the circuit.
Step 5
Draw the wave pattern
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Answer
On Figure 9, draw a square wave that ranges from 0 V to 5 V, with a period of 0.2 ms, displaying a 75% duty cycle.