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4.1 Explain the term polarisation as used in the operation of a liquid crystal display (LCD.) 4.2 Refer to the LED seven-segment display and explain the difference between a common anode and a common cathode - NSC Electrical Technology Digital - Question 4 - 2019 - Paper 1
Question 4
4.1 Explain the term polarisation as used in the operation of a liquid crystal display (LCD.) 4.2 Refer to the LED seven-segment display and explain the difference ... show full transcript
Worked Solution & Example Answer:4.1 Explain the term polarisation as used in the operation of a liquid crystal display (LCD.) 4.2 Refer to the LED seven-segment display and explain the difference between a common anode and a common cathode - NSC Electrical Technology Digital - Question 4 - 2019 - Paper 1
Step 1
Explain the term polarisation as used in the operation of a liquid crystal display (LCD.)
Answer
Polarisation is the process of restricting the vibration of light waves to a single plane. In liquid crystal displays (LCDs), this is achieved through the use of polarising filters. An LCD consists of two layers of polarised glass, which can either align or misalign light to either transmit or block it. This manipulation of light allows for the display of images by controlling the passage of light through the liquid crystals.
Step 2
Refer to the LED seven-segment display and explain the difference between a common anode and a common cathode.
Answer
In a common anode configuration, the anodes of all eight LEDs are connected to a common positive voltage rail. This means that each LED is activated by grounding its cathode. In contrast, in a common cathode configuration, all the LED cathodes are connected to a common ground, allowing activation by applying a positive voltage to each anode. The main difference lies in how the LEDs are powered and switched on, fundamentally affecting the circuit design.
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Study FIGURE 4.4 below of the logic circuit of a full adder using two half-adders and an OR-gate.
Answer
The truth table for the full adder will include inputs for C_i (carry input), A, and B, and outputs for Sum and C_o (carry output). The conditions for Sum and C_o can be defined as follows:
- For inputs (0,0,0): Sum = 0, C_o = 0
- For inputs (0,0,1): Sum = 1, C_o = 0
- For inputs (0,1,0): Sum = 1, C_o = 0
- For inputs (0,1,1): Sum = 0, C_o = 1
- For inputs (1,0,0): Sum = 1, C_o = 0
- For inputs (1,0,1): Sum = 0, C_o = 1
- For inputs (1,1,0): Sum = 0, C_o = 1
- For inputs (1,1,1): Sum = 1, C_o = 1.
Step 7
Draw the logic circuit of this flip-flop using NAND gates, NOR gates and an inverter.
Answer
The D-type flip-flop’s logic circuit is built utilizing two NAND gates coupled with an inverter. The D input feeds into the gates configured to store and output the state based on the CLK signal. This circuit enables data sampling at the edge of the clock pulse, ensuring that the output only changes state when CLK transitions.
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