5.1 Explain polarisation when used in the operation of a liquid crystal display (LCD) - NSC Electrical Technology Digital - Question 5 - 2024 - Paper 1

In a common anode display, the anodes of all LEDs are connected to a common positive voltage rail, meaning each cathode is connected to ground to light up the segment. Conversely, in a common cathode display, all cathodes are connected together to a common 0 V, and the anodes are connected to individual control pins.

The complete diagram should include two full adders labeled as F/A and the half adder labeled as H/A, with connections for inputs A0, A1, B0, and B1, and the carry connections indicated clearly.

When switch 7 is pressed, the binary code at the output will reflect the activated state corresponding to that switch, resulting in a specific binary number that should be documented on the answer sheet based on the diagram.

Pulse triggering refers to the behavior of a circuit changing its state at any time during the 'high' period of a clock pulse. This means that the flip-flop can register input signals during specific moments of the clock cycle.

The logic circuit should include two half adders which take inputs A and B, and the outputs connect to an OR gate to derive the sum and carry outputs correctly.

The logic circuit for the JK-type flip-flop should include two AND gates, a clock input, and should show the connections to set/reset outputs, demonstrating how the flip-flop functions.

The output waveforms should illustrate how the Q output behaves based on the clock pulse, J and K inputs, starting from a low state and demonstrating the correct transitions during each clock cycle.

The circuit shown in FIGURE 5.8 is asynchronous as the output states change independently of a common clock signal; the outputs change based directly on the input clock pulses.

A disadvantage of up/down counters is that they tend to be slower than regular up or down counters, which can hinder performance in high-speed applications.

The sketch should represent a shift register with four flip-flops arranged in series, showing inputs for Serial Data In, Clear, and the outputs for QA, QB, QC, and QD. Each flip-flop should be labelled appropriately to complete the design.