Refer to FIGURE 4.1 and answer the questions that follow - NSC Electrical Technology Electronics - Question 4 - 2022 - Paper 1

An increase in $V_{GS}$ beyond the threshold level enhances the conduction channel between the drain and source terminals of the MOSFET. This increased voltage allows electrons to flow more freely, thereby reducing the resistance between the drain and source, which allows a higher current to flow.

The characteristic curve in FIGURE 4.2 is the input/output transfer characteristic of the FET, demonstrating the relationship between the input voltage and the resulting drain current.

The output waveform should resemble a typical FET output characteristics curve, where the output voltage transitions based on the varying input voltage.

One application of the UJT is as a triggering device in SCR and TRIAC circuits for power control.

When $V_{BB}$ is applied, it creates two resistances that form a potential divider, establishing a voltage at the point where the P-N junction is positioned. This leads to the UJT being forward biased, allowing current to flow.

In the negative resistance region, an increase in voltage across the UJT results in a decrease in current, contrary to typical circuit behavior. This phenomenon occurs due to the relationship between the emitter current and the base-emitter voltage, allowing for oscillatory behavior in certain applications.

The circuit diagram in FIGURE 4.4 represents a UJT relaxation oscillator, which is used to generate pulse signals.

This circuit operates by charging the capacitor through the resistor until the voltage across the capacitor reaches a level that triggers the UJT. When triggered, the UJT rapidly discharges the capacitor, creating a pulse output, and the cycle repeats.

The normally open (NO) contact will close when the circuit is energized, causing current to flow, which turns on the relay or transistor controlling the contact. This enables the operation of devices connected to the NO contact.

The voltage at point A is 1.4 V, established due to the resistor divider network in the circuit.

The gain of the op amp can be calculated using the formula: $Gain = \frac{R_{F}}{R_{in}} = \frac{1k \Omega}{1k \Omega} = 1$.

The output signal will have a phase shift of 180°, meaning it will be inverted compared to the input signal.

Increasing the value of $R_{F}$ leads to enhanced gain of the op amp, reduced negative feedback, and improved signal conditioning capabilities.

Pin 7 of the 555 IC is used as the discharge pin, providing a discharge path for the timing capacitor in astable and monostable modes.

The 555 IC is triggered when the voltage at pin 2 falls below one-third of the supply voltage. This leads to the output transitioning HIGH, thereby activating the timing or oscillating function of the 555 timer.